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Wednesday, May 16, 2012

Makefile puzzle

I am facing a bizarre situation in which a macro which is set to a certain value, and which shows that value when I print it out, does not test as equal to that value in an 'ifeq' statement.



Essentially, I have two files, Makefile.header and Makefile.body.



Makefile.header defines the macro thus:



TESTME=yes



Makefile.body tests the macro thus:



include Makefile.header



ifeq ($(TESTME), yes)

all:

@echo YES, value is $(TESTME)

else

all:

@echo NO, value is $(TESTME)

endif



When I do a 'make -f Makefile.body', I see:



"NO, value is yes"



If I do a 'make -f Makefile.body -p", it prints the line:

TESTME = yes



I have experimented with spacing around the ifeq () clause. I have also isolated the construct into a smaller and simpler set of files and it worked as expected. I also exported TESTME from the header (did not work), and lead-piped the value to 'yes' just before it was evaluated (performed properly as expected). Wrapping only the ECHO statement in ifeq's (rather than the declaration of the target) did not make the anomaly go away.



Why would a macro expand to one thing when it is printed and another when it is evaluated???



Enquiring minds want to know.



RDeW